XFree86 server 4.x Design (DRAFT) : Resource Access Control Introduction
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4. Resource Access Control Introduction

Graphics devices are accessed through ranges in I/O or memory space. While most modern graphics devices allow relocation of such ranges many of them still require the use of well established interfaces such as VGA memory and IO ranges or 8514/A IO ranges. With modern buses (like PCI) it is possible for multiple video devices to share access to these resources. The RAC (Resource Access Control) subsystem provides a mechanism for this.

4.1. Terms and Definitions

4.1.1. Bus

``Bus'' is ambiguous as it is used for different things: it may refer to physical incompatible extension connectors in a computer system. The RAC system knows two such systems: The ISA bus and the PCI bus. (On the software level EISA, MCA and VL buses are currently treated like ISA buses). ``Bus'' may also refer to logically different entities on a single bus system which are connected via bridges. A PCI system may have several distinct PCI buses connecting each other by PCI-PCI bridges or to the host CPU by HOST-PCI bridges.

Systems that host more than one bus system link these together using bridges. Bridges are a concern to RAC as they might block or pass specific resources. PCI-PCI bridges may be set up to pass VGA resources to the secondary bus. PCI-ISA buses pass any resources not decoded on the primary PCI bus to the ISA bus. This way VGA resources (although exclusive on the ISA bus) can be shared by ISA and PCI cards. Currently HOST-PCI bridges are not yet handled by RAC as they require specific drivers.

4.1.2. Entity

The smallest independently addressable unit on a system bus is referred to as an entity. So far we know ISA and PCI entities. PCI entities can be located on the PCI bus by an unique ID consisting of the bus, card and function number.

4.1.3. Resource

``Resource'' refers to a range of memory or I/O addresses an entity can decode.

If a device is capable of disabling this decoding the resource is called sharable. For PCI devices a generic method is provided to control resource decoding. Other devices will have to provide a device specific function to control decoding.

If the entity is capable of decoding this range at a different location this resource is considered relocatable.

Resources which start at a specific address and occupy a single continuous range are called block resources.

Alternatively resource addresses can be decoded in a way that they satisfy the conditions:

                    address & mask == base
                       base & mask == base
Resources addressed in such a way are called sparse resources.

4.1.4. Server States

The resource access control system knows two server states: the SETUP and the OPERATING state. The SETUP state is entered whenever a mode change takes place or the server exits or does VT switching. During this state all entity resources are under resource access control. During OPERATING state only those entities are controlled which actually have shared resources that conflict with others.

XFree86 server 4.x Design (DRAFT) : Resource Access Control Introduction
Previous: Driver Interface
Next: Control Flow in the Server and Mandatory Driver Functions